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INCF and DECF Instructions for PIC Microcontroller

INCF and DECF Instructions for PIC Microcontroller

Posted on May 23, 2022May 23, 2022 by Aamir Javed

This post describes INCF and DECF Instructions for PIC Microcontroller with relevant examples. INCF / DECF instructions are used to increment / decrement a file register.

Note: For this tutorial I am using MPLAB X v5.0 but you can use any version upto v5.35. Version 5.35 is last version that included MPASM i.e. the assembler we require to compile the assembly code used in this tutorial. Code given here may not work for later versions.

INCF: Increment f

Syntax: INCF f{,d{,a}}

Length of the Instruction: 2 bytes

Instruction Cycles: 1

Instruction Encoding: 0010 10da ffff ffff

Updated Flags: Z, N, C, DC, OV

Destination: WREG if d = 0 / d = w. File register f if d = 1 / d = f. Destination is optional and the default is d = 1 / d = f.

Access Bit: Access bank is used if a = 0. BSR is used to select the bank if a = 1. Access bit is optional and the default is a = 0.

Description: PIC Microcontroller INCF Instruction adds ‘1‘ to the contents of file register f and stores the result to WREG or f (depending on d bit).

Example: INCF

Consider the following code

    MOVLW	0x85		; Load 0x85 into WREG
    MOVWF	0x01		; Copy WREG to location 0x01
    INCF	0x01, W		; W = f + 1 = 0x85 + 1 = 0x86 => Increment the contents of location 0x01 and store the result in WREG
    MOVLW	0x90		; Load 0x90 into WREG
    INCF	0x01, F		; f = f + 1 = 0x85 + 1 = 0x86 => Increment the contents of location 0x01 and store the result in location 0x01

The destination of the first INCF instruction is WREG. After the first INCF instruction, WREG contains 0x86 (result of first INCF). and RAM location 0x01 contains 0x85 (unchanged). The destination of the second INCF instruction is file register f. After the second INCF instruction, WREG contains 0x90 (loaded in the previous instruction) and RAM location 0x01 contains 0x86 (result of second INCF).

DECF: Decrement f

Syntax: DECF f{,d{,a}}

Length of the Instruction: 2 bytes

Instruction Cycles: 1

Instruction Encoding: 0000 01da ffff ffff

Updated Flags: Z, N, C, DC, OV

Destination: WREG if d = 0 / d = w. File register f if d = 1 / d = f. Destination is optional and the default is d = 1 / d = f.

Access Bit: Access bank is used if a = 0. BSR is used to select the bank if a = 1. Access bit is optional and the default is a = 0.

Description: PIC Microcontroller DECF Instruction subtracts ‘1‘ from the contents of file register f and stores the result to WREG or f (depending on d bit).

Example: DECF

Consider the following code

    MOVLW	0x85		; Load 0x85 into WREG
    MOVWF	0x01		; Copy WREG to location 0x01
    DECF	0x01, F		; f = f - 1 = 0x85 - 1 = 0x84 => Decrement the contents of location 0x01 and store the result in location 0x01
    DECF	0x01, W		; w = f - 1 = 0x85 - 1 = 0x83 => Decrement the contents of location 0x01 and store the result in WREG

The destination of the first DECF instruction is file register f. After the first DECF instruction, WREG contains 0x85 (unchanged). and RAM location 0x01 contains 0x84 (result of first DECF). The destination of the second DECF instruction is WREG. After the second DECF instruction, WREG contains 0x83 (result of first DECF) and RAM location 0x01 contains 0x84 (unchanged).

Example: Writing loop using DECF and BNZ

Consider a code that runs 100 times. It copies a value from PORTB at each iteration, complements it and adds the result to WREG. After the loop ends, value of WREG is moved to PORTC.

COUNT EQU 0x01		; Define loop variable
COUNT_Value EQU D'100'  ; number of times the loop is to be executed

R1  EQU	0x02
	
	MOVLW	COUNT_Value	; load COUNT_Value into WREG
	MOVWF	COUNT		; Copy WREG (COUNT_Value) into COUNT
	SETF	TRISB		; Make PORTB an input
	CLRF	TRISC		; Make PORTC an output
	MOVLW	0x0		; Clear WREG
	
LOOP	
  MOVFF	PORTB, R1	; First instruction of the loop. Copy PORTB to R1
	COMF	R1, F		; Complement R1
	ADDWF	R1, W		; Add R1 to WREG and place the result in WREG      	  
	DECF	COUNT,F		; Decrement the loop counter (COUNT)
	BNZ	LOOP		; If COUNT is not zero then conditional branch to LOOP label occurs and next iteration is executed.	
	
	MOVWF	PORTC		; Copy WREG to PORTC, after the loop end

After the last loop instruction (ADDWF R1, W), DECF instruction is used to decrement the loop counter. BNZ conditional branch instruction is placed immediately after DECF. Code branches to the start of the loop if zero flag bit (Z) is not zero. Otherwise the code continues to the instruction immediately after BNZ.

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